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  MP28256 21v, 3a 500khz synchronous step-down coverter MP28256 rev. 1.0 www.monolithicpower.com 1 11/3/2011 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2011 mps. all rights reserved. the future of analog ic technology description the MP28256 is a synchronous rectified step- down switch mode converter with built in internal power mosfets. it offers a very compact solution to achieve 3a continuous output current over a wide input supply range with excellent load and line regulation. the MP28256 has synchronous mode operation for higher efficiency over output current load range. current mode operation provides fast transient response and eases loop stabilization. full protection features include ocp and thermal shut down. the MP28256 requires a minimum number of readily available standard external components and is available in a space saving qfn14 (3x4mm) package. features ? wide 4.5v to 21v operating input range ? 0.6v internal reference with 2% accuracy ? 3a output current ? low rds(on) internal power mosfets ? fixed 500khz switching frequency ? frequency sync from 300khz to 2mhz external clock ? external soft start ? ocp and thermal shutdown ? separate en and sync pins ? available in a qfn14 (3x4mm) package. applications ? dsl modems ? cable modems ? set top boxes for mps green status, please visit mps website under quality assurance. ?mps? and ?the future of analog ic technology? are registered trademarks o f monolithic power systems, inc. typical application efficiency vs. load current v out =1.2v efficiency (%) load current (a) 0 10 20 30 40 50 60 70 80 90 100 00.5 11.5 22.5 33.5 v in =21v v in =12v v in =4.5v
MP28256 ? 21v, 3a, 500khz synchronous step-down converter MP28256 rev. 1.0 www.monolithicpower.com 2 11/3/2011 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2011 mps. all rights reserved. ordering information part number* package top marking free air temperature (t a ) MP28256el qfn14 (3x4mm) 28256 -20 ? c to +85 ? c * for tape & reel, add suffix ?z (e.g. MP28256el?z); for rohs, compliant packaging, add suffix ?lf (e.g. MP28256el?lf?z). package reference absolute maxi mum ratings (1) v in .................................................. -0.3v to 22v v sw .................................................. -0.3v to 23v v bst ...................................................... v sw + 6v all other pins .................................... -0.3v to 6v junction temperature ............................... 150 ? c lead temperature .................................... 260 ? c continuous power dissipation (t a = +25c) (2) ............................................................. 2.6w junction temperature ............................... 150 ? c operating temperature.............. -20 ? c to +85 ? c recommended operating conditions (3) supply voltage v in ........................... 4.5v to 21v output voltage v out ......................... 0.6v to 18v maximum junction temp. (t j ) ............... +125 ? c thermal resistance (4) ja jc qfn14 (3x4mm) ..................... 48 ...... 11 ... ? c/w notes: 1) exceeding these ratings may damage the device. 2) the maximum allowable power dissipation is a function of the maximum junction temperature t j (max), the junction-to- ambient thermal resistance ja , and the ambient temperature t a . the maximum allowable continuous power dissipation at any ambient temperature is calculated by p d (max) = (t j (max)-t a )/ ja . exceeding the maximum allowable powe r dissipation will cause excessive die temperature, and the regulator will go into thermal shutdown. internal thermal shutdown circuitry protects the device from permanent damage. 3) the device is not guaranteed to function outside of its operating conditions. 4) measured on jesd51-7, 4-layer pcb.
MP28256 ? 21v, 3a, 500khz synchronous step-down converter MP28256 rev. 1.0 www.monolithicpower.com 3 11/3/2011 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2011 mps. all rights reserved. electrical characteristics (5) v in = 12v, t a = 25 ? c, unless otherwise noted. parameters symbol condition min typ max units supply current (shutdown) i in v en = 0v 1 a supply current (quiescent) i q v en = 2v, v fb = 1v 0.7 ma hs switch on resistance hs rds-on 120 m ? ls switch on resistance ls rds-on 20 m ? switch leakage sw lkg v en = 0v, v sw = 0v or 12v 0.1 1 a current limit i limit d=40% 4.2 a oscillator frequency f sw v fb =750mv 425 500 575 khz minimum on time t on-min 80 ns maximum duty cycle d max v fb = 750mv 85 90 % sync frequency range f sync 0.3 2 mhz feedback voltage v fb 591 603 615 mv feedback current i fb v fb = 600mv 10 50 na en rising threshold v en rising 1.1 1.3 1.6 v en threshold hysteresis v en hys 0.4 v en input current i en v en =2v 2 a v en =0v 0.1 a sync input high level v hi 1.8 v sync input low level v lo 0.4 v sync input current i sync v sync =6v 0.01 0.1 a soft-start current i ss v ss =0 10 a v in under voltage lockout threshold rising inuv vth 3.8 4.0 4.2 v v in under voltage lockout threshold hysteresis inuv hys 880 mv vcc regulator v cc 5 v vcc load regulation icc=5ma 5 % thermal shutdown t sd 150 c
MP28256 ? 21v, 3a, 500khz synchronous step-down converter MP28256 rev. 1.0 www.monolithicpower.com 4 11/3/2011 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2011 mps. all rights reserved. typical performanc e characteristics performance curves are tested on the evaluation board of the design example section. v in = 12v, v out = 1.2v, l = 2.8h, t a = +25oc, unless otherwise noted. input voltage (v) enable supply c urrent vs . input voltage v fb =1v operating range vcc regulator line regulation input voltage (v) v in (v) v cc (v) duty cycle (%) line regulation input voltage (v) error (%) case temperature rise vs. output current input voltage (v) load current (a) disabled supply current vs . input voltage v en =0v output voltage (v) current limit vs. duty cycle load regulation 500 550 600 650 700 750 800 850 900 950 1000 0 5 10 15 20 25 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 0 5 10 15 20 25 4.3 4.4 4.5 4.6 4.7 4.8 4.9 5 5.1 5.2 0 5 10 15 20 25 0 1020304050607080 current limit (a) 0.1 1 10 100 0 5 10 15 20 25 -0.1 -0.08 -0.06 -0.04 -0.02 0 0.02 0.04 0.06 0.08 0.5 0 1 1.5 2 2.5 3 3.5 load current (a) v in =6v v in =12v v in =21v -0.1 -0.08 -0.06 -0.04 -0.02 0 0.02 0.04 0.06 0.08 0 5 10 15 20 25 error (%) i out =3a i out =1.5a i out =0a 0 2 4 6 8 10 12 0 0.5 1 1.5 2 2.5 3 3.5 0 1 2 3 4 5 6 7 8 d maxlimit minimum on time limit
MP28256 ? 21v, 3a, 500khz synchronous step-down converter MP28256 rev. 1.0 www.monolithicpower.com 5 11/3/2011 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2011 mps. all rights reserved. typical performanc e characteristics (continued) performance curves are tested on the evaluation board of the design example section. v in = 12v, v out = 1.2v, l = 2.8h, t a = +25oc, unless otherwise noted. efficiency v out =1.2v load current (a) efficiency v out =1.8v load current (a) efficiency v out =2.5v load current (a) efficiency v out =3.3v load current (a) 0 10 20 30 40 50 60 70 80 90 100 0 0.5 1 1.5 2 2.5 3 3.5 v in =21v v in =12v v in =4.5v 0 10 20 30 40 50 60 70 80 90 100 0 0.5 1 1.5 2 2.5 3 3.5 v in =21v v in =12v v in =4.5v 0 10 20 30 40 50 60 70 80 90 100 0 0.5 1 1.5 2 2.5 3 3.5 v in =21v v in =12v v in =4.5v 0 10 20 30 40 50 60 70 80 90 100 0 0.5 1 1.5 2 2.5 3 3.5 v in =21v v in =12v v in =4.5v
MP28256 ? 21v, 3a, 500khz synchronous step-down converter MP28256 rev. 1.0 www.monolithicpower.com 6 11/3/2011 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2011 mps. all rights reserved. typical performanc e characteristics (continued) performance curves are tested on the evaluation board of the design example section. v in = 12v, v out = 1.2v, l = 2.8h, t a = +25oc, unless otherwise noted. enable startup with 3a load enable startup without load power up without load power up with 3a load v out 1v/div v sw 5v/div i inductor 5a/div v out 1v/div v en 5v/div v sw 10v/div i inductor 2a/div i inductor 5a/div v out 1v/div v en 5v/div v sw 10v/div i inductor 2a/div v out 1v/div v in 10v/div v sw 5v/div i inductor 5a/div 1ms/div 2ms/div 1ms/div 1ms/div 1ms/div short entry short recovery output ripple voltage i out =3a input ripple voltage i out =3a v out 1v/div v in 10v/div v sw 5v/div i inductor 5a/div v out 1v/div v sw 5v/div i inductor 5a/div 1ms/div v sw 5v/div v sw 5v/div v out /ac 10mv/div v in /ac 100mv/div load transient response i out =1.5a-3a v out /ac 100mv/div i out 1a/div
MP28256 ? 21v, 3a, 500khz synchronous step-down converter MP28256 rev. 1.0 www.monolithicpower.com 7 11/3/2011 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2011 mps. all rights reserved. pin functions qfn14 (3x4mm) pin # name description 1 in supply voltage. the MP28256 operates from a +4.5v to +21v input rail. c1 is needed to decouple the input rail. use wide pcb traces and multiple vias to make the connection. 2,3,4,5 sw switch output. use wide pcb traces and multiple vias to make the connection. 6 bst bootstrap. a capacitor connected between sw and bst pins is required to form a floating supply across the high-side switch driver. 7 sync this pin serves as frequency synchronous clock input. 8 fb feedback. an external resistor divider from the output to gnd, tapped to the fb pin, sets the output voltage. to prevent current limit run away during a short circuit fault condition the frequency fold-back comparator lowers the oscillator frequency when the fb voltage is below 100mv. 9 en en=1 to enable the MP28256. for automatic start-up, connect en pin to vin with 100khz resistor. there is an internal 1m ? pull-down resistor at en pin. 10 ss soft start. connect an external capacitor to program the soft start time for the switch mode regulator. 11 vcc bias supply. decouple with 0.1 f~0.22 f cap. and the capacitance should be no more than 0.22 f. 12,13 gnd system ground. this pin is the reference ground of the regulated output voltage. for this reason care must be taken in pcb layout. 14 agnd signal ground. agnd is not internally connected to system ground, make sure agnd connected to system ground in pcb layout. exposed pad no internal connection. it is recommended to connect exposed pad to gnd plane for optimal thermal performance.
MP28256 ? 21v, 3a, 500khz synchronous step-down converter MP28256 rev. 1.0 www.monolithicpower.com 8 11/3/2011 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2011 mps. all rights reserved. operation the MP28256 is a high frequency synchronous rectified step-down switch mode converter with built in internal power mosfets. it offers a very compact solution to achieve more than 3a continuous output current over a wide input supply range with excellent load and line regulation. the MP28256 operates in a fixed frequency, peak current control mode to regulate the output voltage. a pwm cycle is initiated by the internal clock. the integrated high-side power mosfet is turned on and remains on until its current reaches the value set by the comp voltage. when the power switch is off, it remains off until the next clock cycle starts. if, in 90% of one pwm period, the current in the power mosfet does not reach the comp set current value, the power mosfet will be forced to turn off. error amplifier the error amplifier compares the fb pin voltage with the internal 0.6v reference (ref) and outputs a current proportional to the difference between the two. this output current is then used to charge or discharge the internal compensation network to form the comp voltage, which is used to control the power mosfet current. the optimized internal compensation network minimizes the external component counts and simplifies the control loop design. internal regulator most of the internal circuitries are powered from the 5v internal regulator. this regulator takes the vin input and operates in the full vin range. when vin is greater than 5.0v, the output of the regulator is in full regulation. when vin is lower than 5.0v, the output decreases, a 0.1uf ceramic capacitor for decoupling purpose is required. enable control the MP28256 has a dedicated enable control pin (en). by pulling it high or low, the ic can be enabled and disabled by en. tie en to vin through a resistor for automatic start up. to disable the part, en must be pulled low. frequency synchronizing the MP28256 can be synchronized to external clock range from 300 khz up to 2mhz through the sync pin. the internal clock rising edge is synchronized to the external clock rising edge. under-voltage lockout (uvlo) under-voltage lockout (uvlo) is implemented to protect the chip from operating at insufficient supply voltage. the MP28256 uvlo comparator monitors the output voltage of the internal regulator, vcc. the uvlo rising threshold is about 4.0v while its falling threshold is a consistent 3.2v. external soft-start the soft start time can be adjusted by connecting a capacitor from this pin to ground. when the soft-start period starts, an internal 10ua current source begins charging the external capacitor. during soft-start, the voltage on the soft-start capacitor is connected to the non-inverting input of the error amplifier. the soft-start period lasts until the voltage on the soft-start capacitor exceeds the reference voltage of 0.6v. at this point the reference voltage takes over at the no inverting error amplifier input. the soft-start time can be calculated as follows: ss ss 0.6v c (nf) t(ms) 10 a ? ? ? if the output of the MP28256 is pre-biased to a certain voltage during startup, the ic will disable the switching of both high-side and low-side switches until the voltage on the internal soft-start capacitor exceeds the sensed output voltage at the fb pin. over-current-protection the MP28256 has hiccup over current limit when the inductor current peak value exceeds the set current limit threshold. when output voltage drops below 70% of the reference, and inductor current exceeds the current limit at the meantime, MP28256 will be hiccup. this is especially useful to ensure system safety under fault condition. the latch-off function is disabled during soft-start duration.
MP28256 ? 21v, 3a, 500khz synchronous step-down converter MP28256 rev. 1.0 www.monolithicpower.com 9 11/3/2011 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2011 mps. all rights reserved. thermal shutdown thermal shutdown is implemented to prevent the chip from operating at exceedingly high temperatures. when the silicon die temperature is higher than 150 ? c, it shuts down the whole chip. when the temperature is lower than its lower threshold, typically 140 ? c, the chip is enabled again. floating driver and bootstrap charging the floating power mosfet driver is powered by an external bootstrap capacitor. this floating driver has its own uvlo protection. this uvlo?s rising threshold is 2.2v with a hysteresis of 150mv. the bootstrap capacitor voltage is regulated internally by vin through d1, m1, c4, l1 and c2 (figure 2). if (vin-vsw) is more than 5v, u1 will regulate m1 to maintain a 5v bst voltage across c4. v in v out d1 m1 bst c4 l1 sw u1 5v c2 figure 2?internal bootstrap charging circuit startup and shutdown if both vin and en are higher than their appropriate thresholds, the chip starts. the reference block starts first, generating stable reference voltage and currents, and then the internal regulator is enabled. the regulator provides stable supply for the remaining circuitries. three events can shut down the chip: en low, vin low and thermal shutdown. in the shutdown procedure, the signaling path is first blocked to avoid any fault triggering. the comp voltage and the internal supply rail are then pulled down. the floating driver is not subject to this shutdown command.
MP28256 ? 21v, 3a, 500khz synchronous step-down converter MP28256 rev. 1.0 www.monolithicpower.com 10 11/3/2011 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2011 mps. all rights reserved. block diagram figure 3?block function diagram
MP28256 ? 21v, 3a, 500khz synchronous step-down converter MP28256 rev. 1.0 www.monolithicpower.com 11 11/3/2011 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2011 mps. all rights reserved. application information component selection setting the output voltage the external resistor divider is used to set the output voltage (see typical application on page 1). the feedback resistor r1 also sets the feedback loop bandwidth with the internal compensation capacitor (see typical application on page 1). choose r1 to be around 10k ? . r2 is then given by: out r1 r2 v 1 0.6v ? ? the t-type network is highly recommended when vo is low, as figure 4 shows. fb 8 rt r2 r1 vout figure 4? t-type network table 1 lists the recommended t-type resistors value for common output voltages. table 1?resistor selection for common output voltages v out (v) r1 (k ? ) r2 (k ? ) rt (k ? ) 1.05 7.5(1%) 10(1%) 24.9(1%) 1.2 10(1%) 10(1%) 24.9(1%) 1.8 10(1%) 4.99(1%) 24.9(1%) 2.5 10(1%) 3.16(1%) 24.9(1%) 3.3 10(1%) 2.20(1%) 24.9(1%) 5 10(1%) 1.36(1%) 24.9(1%) selecting the inductor a 1h to 10h inductor with a dc current rating of at least 25% percent higher than the maximum load current is recommended for most applications. for highest efficiency, the inductor dc resistance should be less than 15m ? . for most designs, the inductance value can be derived from the following equation. out in out 1 in l osc v(vv) l vif ?? ? ?? ? where i l is the inductor ripple current. choose inductor current to be approximately 30% of the maximum load current. the maximum inductor peak current is: 2 i i i l load ) max ( l ? ? ? under light load conditions below 100ma, larger inductance is recommended for improved efficiency. selecting the input capacitor the input current to the step-down converter is discontinuous, therefore a capacitor is required to supply the ac current to the step-down converter while maintaining the dc input voltage. use low esr capacitors for the best performance. ceramic capacitors with x5r or x7r dielectrics are highly recommended because of their low esr and small temperature coefficients. for most applications, a 22f capacitor is sufficient. since the input capacitor (c1) absorbs the input switching current it requires an adequate ripple current rating. the rms current in the input capacitor can be estimated by: ? ? ? ? ? ? ? ? ? ? ? ? in out in out load 1 c v v 1 v v i i the worse case condition occurs at v in = 2v out , where: 2 i i load 1 c ? for simplification, choose the input capacitor whose rms current rating greater than half of the maximum load current. the input capacitor can be electrolytic, tantalum or ceramic. when using electrolytic or tantalum capacitors, a small, high quality ceramic capacitor, i.e. 0.1 f, should be placed as close to the ic as possible. when using ceramic capacitors, make sure that they have enough capacitance to provide sufficient charge to prevent excessive voltage ripple at input. the input voltage ripple caused by capacitance can be estimated by:
MP28256 ? 21v, 3a, 500khz synchronous step-down converter MP28256 rev. 1.0 www.monolithicpower.com 12 11/3/2011 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2011 mps. all rights reserved. load out out in in sin iv v v1 fc1v v ?? ?? ? ?? ?? ? ?? selecting the output capacitor the output capacitor (c2) is required to maintain the dc output voltage. ceramic, tantalum, or low esr electrolytic capacitors are recommended. low esr capacitors are preferred to keep the output voltage ripple low. the output voltage ripple can be estimated by: out out out esr s1 in s vv 1 v1r fl v 8fc2 ?? ?? ?? ?? ? ? ?? ?? ??? ?? ?? where l 1 is the inductor value and resr is the equivalent series resistance (esr) value of the output capacitor. in the case of ceramic capacitors, the impedance at the switching frequency is dominated by the capacitance. the output voltage ripple is mainly caused by the capacitance. for simplification, the output voltage ripple can be estimated by: out out out 2 in s1 vv v1 v 8f l c2 ?? ??? ?? ??? ?? in the case of tantalum or electrolytic capacitors, the esr dominates the impedance at the switching frequency. for simplification, the output ripple can be approximated to: out out out esr in s1 vv v1r fl v ?? ???? ?? ? ?? the characteristics of the output capacitor also affect the stability of the regulation system. the MP28256 can be optimized for a wide range of capacitance and esr values. external bootstrap diode an external bootstrap diode may enhance the efficiency of the regulator, the applicable conditions of external bst diode are: ? v out is 5v or 3.3v; and ? duty cycle is high: d= in out v v >65% in these cases, an external bst diode is recommended from the vcc pin to bst pin, as shown in figure 5. figure 5?add optional external bootstrap diode to enhance efficiency the recommended external bst diode is in4148, and the bst cap is 0.1~1 f. pc board layout the high current paths (gnd, in and sw) should be placed very close to the device with short, direct and wide traces. the input capacitor needs to be as close as possible to the in and gnd pins. the external feedback resistors should be placed next to the fb pin. keep the switching node sw short and away from the feedback network.
MP28256 ? 21v, 3a, 500khz synchronous step-down converter notice: the information in this document is subject to change wi thout notice. please contact m ps for current specifications. users should warrant and guarantee that third party intellectual property rights ar e not infringed upon when integrating mps products into any application. mps will not assume any legal responsibility for any said applications. MP28256 rev. 1.0 www.monolithicpower.com 13 11/3/2011 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2011 mps. all rights reserved. package information qfn14 (3x4mm) side view top view 1 14 87 bottom view 2. 90 3. 10 1.60 1.80 3.90 4.10 3.20 3.40 0.50 bsc 0.18 0.30 0.80 1.00 0.00 0.05 0.20 ref pin 1 id marking 1.70 0.50 0.25 recommended land pattern 2.90 note: 1) all dimensions are in millimeters . 2) exposed paddle size does not include mold flash . 3) lead coplanarity shall be 0.10 millimeter max. 4) jedec reference is mo-229, variation vged-3. 5) drawing is not to scale. pin 1 id see detail a 3.30 0.70 pin 1 id option b r0.20 typ. pin 1 id option a 0.30x45 o typ. detail a 0.30 0.50 pin 1 id index area


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